In this tutorial, I would take one diode logic circuit, which is important for GATE and written exams for campus ( off-campus) placement.

What is the output of the GATE Circuit shown in the below figure?

(A) \((A+B) (C+D)\)

(B) \(AB + CD\)

(D) \(\overline {(A+B) (C+D)}\)

Solution:

We shall solve this problem by breaking the circuit into three parts.

One can find out the truth table of this circuit easily. Just need to consider three things

I) Diode conducts in FB, gives very small resistance. In the case of RB, gives very high resistance.

II) f1 output node is experiencing a fight between two resistors. One is a passive resistor, another one is given by the non-linear diode resistor.

III) The largest and the smallest potential available in the circuit are VCC and -VCC. So logic '1' is VCC. Logic '0' is -VCC.

Remember, Any node potential is dominated by a node having the smallest resistor connected in between them. The f1 is dominated by the VCC when diodes are off (R is smaller than diode off resistance). Similarly, f1 node potential is dominated by input when any of the diodes are on.

A B f1

0 0 0

0 1 0

1 0 0

1 1 1

Clearly this truth table shows f1= AB

Again we can directly find the output with the help of the truth table, discussed earlier. Output can be predicted directly also. When Diodes are in parallel in a diode logic circuit, find the logic value of the inputs, which ensures diodes are reverse biased. Note down the logic value at the output for the condition of the same inputs. If the output is '1', that's minterm. Otherwise, you get a max term.

That minterm or maxterm is your boolean logic function.

For example, diodes are off for C = '1' and D= '1', and the output is given as '1' (minterm). So, f2 = CD. One may ask if the diodes are not connected in the same order, then? Well, in that case, it may happen both the diodes are on for different input conditions. Again fight between the diodes, a diode having smaller on-resistance shall win (output is close to that potential, [voltage divider] ). That's not very smart logic I would say.

let's apply the last method. Both diodes are off, iff f1 = '0' and f2 = '0' and the corresponding output is '0' (Maxterm). f = f1+f2.

So the final logic output (B) f=AB+CD.

If you have any doubt, let me know in the comment section. For other tutorials check INDEX. For further updates follow my blog (rlcanalog.blogspot.com). The blog is specially made for GATE and VLSI aspirants (GATE Electronics( GATE & VLSI)).