Showing posts with label Analog interview. Show all posts
Showing posts with label Analog interview. Show all posts

INTRINSIC GAIN METHOD EX-1

FINDING GAIN OF DEGENERATED & CASCODE AMPLIFIER 


In this post, we shall discuss two basic amplifiers. 

Q1) Find the gain.



Solution: 

From the signal flow, it is evident that the amplifier is in CS mode.
Let's directly write the gain expression. What is the Intrinsic Gain Method

$GAIN=V_{IN} \times \frac{R_{LOAD}}{R_{LOAD}+R_{OUT}}$

Now, ${R_{LOAD}=R_{D}}$ ; ${R_{OUT}=r_{0}+M \times R_{S}}$, where $M= 1+g_{m}r_{0}$

How did I write the above expression? Go check.
$GAIN= -g_{m}r_{0} \times \frac {R_{D}}{R_{D}+(r_{0}+M \times R_{S})} \approx -g_{m}r_{0}\times \frac {R_{D}}{M \times R_{S}} \approx -\frac{R_{D}}{R_{S}}$

Let's try to solve it by another method called, $G_{m}r_{out}$ method and match the results with the above result.


Another Method: 

We know the equivalent transconductance of the source-degenerated CS is $G_{M}= - \frac {g_{m}}{1+g_{m}R_{S}}$

$R_{eq}=R_{LOAD} || R_{OUT} \approx R_{D}$

$GAIN=G_{M}R_{eq}=- \frac {g_{m}}{1+g_{m}R_{S}} \times R_{S}$

Considering, $g_{m}R_{S}>>1$

$GAIN \approx -\frac{R_D}{R_S}$, which matches with the previous result.



Q2) Find the gain.


           
Solution: Let's draw the schematic for a small signal.





The above diagram shows that M1 and M2 are in CS and CG mode respectively. 
$GAIN= -g_{m1}r_{01} \times M_{2} \times \frac {R_{LOAD}}{R_{LOAD}+R_{OUT}}$
 where, $R_{LOAD}= r_{03}+M_3 \times r_{04} \approx M_3 \times r_{04}$
             $R_{OUT}= r_{02}+M_2 \times r_{01} \approx M_2 \times r_{01}$ 
Now,
The $GAIN= -g_{m1} \times \frac {M_{2} \times r_{01} \times R_{LOAD}}{R_{LOAD}+R_{OUT}}$ =$-g_{m1}(R_{LOAD}|| R_{OUT})$

Let's also try with  $G_{m}r_{out}$ method.


Another Method: 



$\frac{I_{SC}}{V_{IN}}= G_{M}=-g_{m1} \frac {r_{01}}{\frac{1}{g_{m2}}+r_{01}} \approx -g_{m1}$


$GAIN=G_MR_{eq}=-g_m \left(R_{LOAD}||R_{OUT} \right)$, which matches with above result.


 
We will solve more complex circuits in the upcoming posts.
Check previous posts of the series we started "INTRINSIC GAIN METHOD".

PART1: INTRINSIC GAIN METHOD
PART2: INTRINSIC GAIN METHOD PARAMETERS 
PART3: FINDING EQUIVALENT IMPEDANCE

For part 5 follow our blog and don't forget to comment


Fundamental Concept Of Differential Amplifier

This post is going to deal with a very basic concept of differential amplifier. What I personally feel is that, not many students are clear about the virtual ground/ half circuit concept in diff amp. Textbooks will make the half  circuit and simply find the gain, which is the root of the problem. But remember, always go with the basics. So, personally I would prefer to write 5 extra lines instead of the half circuit approach and you will find its worth when you come across the 2nd problem of this post.


Before starting let me tell you the convention. I have used Capital Letters for DC and Small letters for AC. Suppose $V_{out}=V_{OUT}+v_{out}$ where $V_{OUT}$ is the common mode value and $v_{out}$ is the small signal value.


I shall start this post with a very simple and common question. Let's consider the following circuit of Fig:1(a). Let's try to find the differential gain $A_{dm}$ and common mode gain $A_{cm}$. Ignore $g_{ds}$. Take $g_m$ of M1= $g_m$


Let's start with DC analysis, by applying a common voltage of $V_{CM}$ at the gate of M1 and M2. As the gates have same potential and the sources are shorted, hence $V_{GS1}=V_{GS2}$. Also $(W/L)_1=(W/L)_2$. So, the bias current $I_B$ will divide in 1:1 ratio, hence M1 and M2 will carry a current of $\frac{I_B}{2}$. 

$V_{OUT1}=V_{OUT2}=V_{DD}-\frac{I_BR}{2}$

Hence, $A_{cm}=\frac{V_{OUT1}-V_{OUT2}}{VCM}=0$

Now, $g_m=\mu_nC_{ox}\frac{W}{L}\left(V_{GS}-V_{TH}\right)$
So, $g_{m1}=g_{m2}$


Now, let's jump to the ac analysis by applying $+\frac{vin}{2}$ at the gate of M1 and $-\frac{vin}{2}$ at the gate of M2. The $V_{DD}$ is ac grounded and also the $I_B$ is opened as these sources won't change small signal wise.

Let's try to find out what will happen to the $v_x$ small signal wise. Applying KCL at $v_x$,

$g_{m1}v_{gs1}+g_{m2}v_{gs2}=0$
$g_m\left(\frac{v_{in}}{2}-v_x\right)+g_m\left(-\frac{v_{in}}{2}-v_x\right)=0$
$v_x=0$

So, the $v_x$ node won't move small signal wise. Hence, $v_x$ will be at ac ground.

So, $i_1=g_m\frac{v_{in}}{2}  => v_{out1}=-i_1R=-g_mR\frac{v_{in}}{2}$
      $i_2=-g_m\frac{v_{in}}{2} => v_{out2}=-i_2R=g_mR\frac{v_{in}}{2}$

Hence, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-g_mR$


Now, let me make a small change in this circuit with the same question. Let's try to find the differential gain $A_{dm}$ and common mode gain $A_{cm}$ of Fig:2(a). Ignore $g_{ds}$. Take $g_m$ of M1= $g_m$. (First give it an honest try without seeing the solution)


Let's start with DC analysis, by applying a common voltage of $V_{CM}$ at the gate of M1 and M2. As the gates have same potential and the sources are shorted, hence $V_{GS1}=V_{GS2}$. But, $(W/L)_2=5(W/L)_1$. So, the bias current $I_B$ will not divide in 1:1 ratio in this case.

Assuming square law is valid,

$I_1=\frac{\mu_nC_{ox}}{2}\frac{W}{L}\left(V_{GS}-V_{TH}\right)^2$
$I_2=\frac{\mu_nC_{ox}}{2}\frac{5W}{L}\left(V_{GS}-V_{TH}\right)^2$

So, $I_1=\frac{I_B}{6}$ and $I_2=\frac{5I_B}{6}$

$V_{OUT1}=V_{DD}-I_1\left(5R\right)=V_{DD}-\frac{5I_BR}{6}$
$V_{OUT2}=V_{DD}-I_2R=V_{DD}-\frac{5I_BR}{6}$

Hence, $A_{cm}=\frac{V_{OUT1}-V_{OUT2}}{VCM}=0$

Now $g_m=\mu_nC_{ox}\frac{W}{L}\left(V_{GS}-V_{TH}\right)$
So, $g_{m2}=5g_{m1}$

Now, let's jump to the ac analysis by applying $+\frac{vin}{2}$ at the gate of M1 and $-\frac{vin}{2}$ at the gate of M2. The $V_{DD}$ is ac grounded and also the $I_B$ is opened as these sources won't change small signal wise.

Let's try to find out what will happen to the $v_x$ small signal wise. Applying KCL at $v_x$, 


$g_{m1}v_{gs1}+g_{m2}v_{gs2}=0$
$g_m\left(\frac{v_{in}}{2}-v_x\right)+5g_m\left(-\frac{v_{in}}{2}-v_x\right)=0$
$v_x=-\frac{v_{in}}{3}$

So, the $v_x$ node will move small signal wise. Hence, $v_x$ will not be at ac ground.

So, $i_1=g_{m1}v_{gs1}=g_m(\frac{v_{in}}{2}+\frac{v_{in}}{3})=\frac{5g_mv_{in}}{6}$ 
$\Rightarrow v_{out1}=-i_1\left(5R\right)=-\frac{25g_mRv_{in}}{6}$

$i_2=g_{m2}v_{gs2}=5g_m(-\frac{v_{in}}{2}+\frac{v_{in}}{3})=-\frac{5g_mv_{in}}{6}$ 
$\Rightarrow v_{out2}=-i_2R=-\frac{5g_mRv_{in}}{6}$


Hence, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-5g_mR$


Now, you may get a small doubt here. Suppose, you are applying the virtual ground (which is indeed wrong) and you have 2 half circuits.

For the left half circuit, $v_{out1}=-g_m\left(5R\right)\frac{v_{in}}{2}$
For the right half circuit, $v_{out2}=-5g_m\left(R\right)\frac{-v_{in}}{2}$

So, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-5g_mR$ which is matching with the answer. But I would like to say, it's not the right way as your assumption of virtual ground is completely wrong. But it's also important to know, then why is it giving the right answer? Let's find out. For that, we have to know, whether the differential gain depends on the value of $v_x$ or not.

$i_1=g_{m1}v_{gs1}=g_m\left(\frac{v_{in}}{2}-v_x\right)$ 
$\Rightarrow v_{out1}=-i_1\left(5R\right)=-\left(5R\right)g_m\left(\frac{v_{in}}{2}-v_x\right)$

$i_2=g_{m2}v_{gs2}=5g_m\left(-\frac{v_{in}}{2}-v_x\right)$
$\Rightarrow v_{out2}=-i_2\left(R\right)=-\left(5R\right)g_m\left(-\frac{v_{in}}{2}-v_x\right)$

$v_{out1}-v_{out2}=-\left(5R\right)g_m\left(\frac{v_{in}}{2}-v_x\right)+\left(5R\right)g_m\left(-\frac{v_{in}}{2}-v_x\right)$
$\Rightarrow v_{out1}-v_{out2}=-5g_mRv_{in}+5Rv_x-5Rv_x=-5g_mRv_{in}$

So, basically the terms containing $v_x$ are cancelling each other, that's why the differential gain is not depending on the value of $v_x$. But for dc wise imbalanced circuit, it won't happen and the answer will be wrong if you consider $v_x$ as virtual ground.


I hope, next time you won't face any confusion related to half circuit analysis or virtual ground. Happy learning.

How to Prepare for Texas Instruments Analog Profile

How to Prepare for Texas Instruments Analog Profile



Texas Instruments has been making progress possible for decades. TI is a global semiconductor company that designs, manufactures, tests, and sells analog and embedded processing chips. Their approximately 80,000 products help over 100,000 customers efficiently manage power, accurately sense and transmit data and provide the core control or processing in their designs, going into markets such as industrial, automotive, personal electronics, communications equipment, and enterprise systems. Their passion to create a better world by making electronics more affordable through semiconductors is alive today as each generation of innovation builds upon the last to make our technology smaller, more efficient, more reliable, and more affordable – opening new markets and making it possible for semiconductors to go into electronics everywhere. They think of this as Engineering Progress. It’s what they do and has been doing for decades.  


TI also has a Digital domain, but in this blog, we shall discuss mainly the Analog domain and the preparation strategy to crack it. If you love Analog, Microelectronics, Devices then TI is one of the best places to work and learn. TI has an awesome work culture.


Recruitment Procedure 

TI has a fixed procedure for the job as well as for the internship.

  1. Online test: It consists of 20 aptitude questions in 20 minutes and 20 technical questions (depending upon profile) in 30 minutes. 
  2. Technical interview: 1/2 rounds of Pure Technical interview. The interview will be more interactive. They will fully cooperate with you and will give you hints if you are stuck at some point.
  3. Human Resource - HR interview: (General question) about yourself, why not Higher Studies? Why TI? What are your strengths and weakness?
You are almost selected if you have reached till HR round unless you screw up big time.

TI Job Profiles

Let's have a look on the job profiles offered in TI for Analog Domain. In Analog, you will work in:
  • Audio
  • Energy automation
  • Electronic point of service
  • Industrial automation
  • Imaging
  • High speed
  • Interface
  • Clocking
  • Medical
  • High volume linear
  • Storage
  • Power supply
  • Linear power
  • Battery management



How to prepare for the Online Test & Technical Interview for internship/ job in TI? 

First let's hear from them 👇

1. PYQs 

2. Basic Network Theory (**Most Important**)

  • Basics of R,L, C
  • Step (voltage/current) response of 1st order RC/RL circuits (intuition method) [They keep on adding the components trying to make it complicated]
  • Pulse (voltage/current) response of 1st order RC/RL circuits (intuition method)
             * T >>RC

             * T <<RC

  • Finding pole/zero by inspection and draw bode plot (intuition method)
  • Charge sharing between capacitors (with and without initial condition)
  • Identification of type of Filters (LPF/HPF/BPF/BSF/APF)


3. Basic Analog Circuit 

  • Regulators
  • Barkhausen Condition & Positive feedback circuits (Oscillators, Multivibrators)
  • Standard OPAMP circuits 
  •     * Inverting Amplifier
        * Non-inverting Amplifier
        * Adder
        * Subtractor
        * Differentiator
        * Integrator  
  • Sign of input terminals of an OPAMP     
  • Analysis of OPAMP circuits with different non-idealities
             * finite open-loop gain
             * finite slew rate
             * finite BW
             * finite input & output resistance
             * finite input-referred offset voltage

  • Identification of Positive and Negative feedback
  • Circuits with multiple feedbacks and which feedback is dominant
  •     

      4. Control System

      • Bode plot (relation between dc gain, gain at infinite frequency, and number of pole-zero)
      • Stability (Gain Margin, Phase Margin, Gain crossover frequency, Phase crossover frequency)


      5. Microelectronic Circuit

      • Basic working principle, I-V characteristics and various region of operation of diode, BJT, MOSFET
      • Gain of different MOSFET(or BJT) based amplifiers (intuition method without small signal model)
                   * CS
                   * CG
                   * CD
                   * Cascade
                   * Cascode
      • Looking in impedance at any node of a MOS/BJT circuit (intuitively without small signal model)
      • Different architectures of current mirrors and headroom of each transistor
      • Differential amplifier with passive and active load, Differential gain and Common-mode gain, CMRR
      • Internal transistor-level circuit of an OTA (Operational Transconductance Amplifier)
      • Different architectures of OTA and pole zeroes
                   * Simple 5T OTA (DC Gain, Pole-zero, UGB, PM, ICMR, Output swing, PSRR)
                   * Telescopic
                   * Folded Cascode
                   * Regulated Cascode
      • 2 stages OTA with Miller compensation and dominant pole
      • Noise and Mismatch (current mirror and diff pair) analysis

      7. Signals & Systems (Not that important)

      • Basics of LTI systems
      • Convolution
      • Frequency domain- CT, DT, DTFT, DFT

      8. Switch Capacitor circuits with two non-overlapping clocks


      Where to study from? What are the available resources? 

      1. Online Video Lectures:

      2. Online Blog:

      3. TI Official PPT:

      4. Books:




      Important: We tried to make this blog very compact and neat. If you want to pursue a career in the analog industry, you must go through the above material. If you find any material which is not listed here and that might help readers, please let us know. Do comment and for further queries, you can mail us at rlcanalog@gmail.com.

      If you have any doubt, let me know in the comment section. For other tutorials check INDEX
      For further updates follow my blog (rlcanalog.blogspot.com). 
      For Better reach, Search "Analog Intuition Blog" on google. 

      Switch Capacitor Circuit-2

      In the last two tutorials on switch capacitor circuits, we developed the basis of charge conservation. So, before you start reading this just go through them once.

       
      Q) Find the steady-state voltage \(V_{out}\), where S1 and S2 get on periodically (Non-overlapping).



      Solution: 

      S1 is on for the first time



      From the above picture, we get \(V_{C1}=V_{1}\) and \(V_{C2}=0\)

      S2 is on for the 1st time



      Here incremental  $ \Delta V= V_{2} - (-V_1)= V_{2} +V_{1}$

      You can check Switch-Cap Basics (Charge Conservation) to have the basic understanding of charge conservation & distribution in a capacitor.

      i) \(V_{C2}= 0 + \Delta V \times \frac{C_1}{C_1+C_2}\)
      = \( \frac{V_{1}+V_{2}}{2}\)

            ii) \(V_{C1}= -V_{1} + \Delta V \times \frac{C_2}{C_1+C_2}= \frac{V_{2}-V_{1}}{2}\)


      S1 is on for the 2nd time

      i) \(V_{C1}= V_{1}\)

      ii) \(V_{C2}=\frac {V_{1}+ V_{2}}{2}\)

      S2 is on for 2nd time

      here incremental \(\Delta V = V_{2} - (-V_{1})- \frac{V_{1}+V_{2}}{2}=\frac{V_{1}+V_{2}}{2}\)

      i)   \( V_{C2}=\frac{V_{1}+V_{2}}{2} + \frac{V_{1}+V_{2}}{2} \times \frac{C_{1}}{C_{1}+C_{2}}\)
      = \(\frac{V_{1}+V_{2}}{2} + \frac{V_{1}+V_{2}}{4} \)

      ii) \( V_{C1}= (-V_{1}) + \frac{V_{1}+V_{2}}{2} \times \frac{C_{2}}{C_{1}+C_{2}}\)


      S1 is on for the 3rd time

      i) \(V_{C1}= V_{1}\)

      ii) \(V_{C2}=\frac{V_{1}+V_{2}}{2} + \frac{V_{1}+V_{2}}{4}\)

      S2 is on for 3rd time

      here incremental \(\Delta V = V_{2} - (-V_{1})- \frac{V_{1}+V_{2}}{2}- \frac{V_{1}+V_{2}}{4}=\frac{V_{1}+V_{2}}{4}\)

      i)   \(V_{C2}=\frac{V_{1}+V_{2}}{2} + \frac{V_{1}+V_{2}}{4} + \frac{V_{1}+V_{2}}{4} \times \frac{C_{1}}{C_{1}+C_{2}}\)
      = \(\frac{V_{1}+V_{2}}{2} + \frac{V_{1}+V_{2}}{4} + \frac{V_{1}+V_{2}}{8}\)

      ii) \( V_{C1}= (-V_{1}) + \frac{V_{1}+V_{2}}{4} \times \frac{C_{2}}{C_{1}+C_{2}}\)


      Following this trend the steady-state voltage
       
      \(V_{out}=V_{C2}= \frac{V_{1}+ V_{2}}{2} + \frac{V_{1}+ V_{2}}{4} +\frac{V_{1}+ V_{2}}{8}.......\) 

      = \(\frac{V_{1}+V_{2}}{2} \times (1+ \frac{1}{2}+\frac{1}{4}+\frac{1}{8}+.....)\)


      =\( \frac {V_{1}+V_{2}}{2} \times \frac {1}{(1-\frac{1}{2})}\)

      =\( V_{1}+V_{2}\)

      Intuition:

      Now, comes the best part (the cherry on the cake)! Obviously, you can't remember this formula, and also you shouldn't try. Let's try to understand it intuitively! ðŸ˜€




      At a steady-state, the potential of the different nodes shouldn't be changing with a change in the phase of the switches. Then one can easily conclude, the voltage across capacitor C1 remains unchanged. 

      \(V_{C1}|_{S1,on}=V_{C2}|_{S2,on}=V_{1}\)

      Applying KVL in the above diagram,
      \(-V_{2}-V_{1}+V_{out}=0\)
      \(=>V_{out}=V_{1}+V{2}\)

       
      Well, to conclude this post, I would like to request everyone (who will visit this blog) to comment below if you find this content helpful and well explained. Also, if you have any suggestions to improve please let me know by commenting below. I would really appreciate this as you know, Negative feedback always makes a system stable. ðŸ˜…


      Now you can try to attempt this 
      Switch Cap Problem-1 to know how much you have understood this concept. For more content click here INDEX

      Switch Capacitor Circuit-1

      Switch-cap Circuits! This is something most of the students are not very comfortable with. But they are very important for analog circuit design. You won't able to make ADC or charge-pump without using a switch cap. For the same reason, you won't able to crack an analog interview without a switch-cap.

      In This tutorial, I will take one switch cap circuit and try to analyze it both quantitively and qualitatively. 


      Q) Find the steady-state output Voltage V2.


      Where S1 and S2 are two non-overlapping pulses.

      Solution:

      Before you watch the solution, I would recommend you try solving it by yourself first.  

      S1 on for 1st time
      At first take S1 is on (While S2 is off), then the equivalent schematic will look like bellow.


      For the first S1 pulse VC1=VC2=0
      \(V_{1}=V_{C2}= 1\times \frac{C}{C+2C}= \frac {1}{3}V\)

      Also, \(V_{C1}=\frac{2} {3}V\)
      S2 on for 1st time
      Now, For S2 pulse, The equivalent circuit would look like this,
      In this case, VC2 is = 1/3 V. Due to charge sharing the node V2 has to jump by 
      \(V_{2}=V_{C2}\times \frac{2C}{2C+3C}= \frac{1}{3} \times \frac{2}{5}=\frac{2}{15}\)V
      Now, at the end of the First pulse of both S1 and S2, the voltage across capacitors are 
      \(V_{C1}= \frac{2}{3}V,V_{C2}= \frac{2}{15}V,V_{C3}= \frac{2}{15}V\)

      S1 on for the 2nd time
      Now, The voltage across C and 2C when S1 is on for the 2nd time are,
      \(V_{C1}= \frac{2}{3}+\{(1-\frac{2}{3}-\frac{2}{15})\times \frac{2}{3}\}=\frac{4}{5}V\) 
      \(V_{C2}= \frac{2}{15}+\{(1-\frac{2}{3}-\frac{2}{15})\times \frac{1}{3}\}=\frac{1}{5}V\)

      P.S: Wonder how I have written these equations? Well, I will suggest looking at this Basic Charge Conservation of Capacitor.

      S2 on for the 2nd time
      Now, The voltage across C and 2C when S2 is on for the 2nd time are,
      \(V_{2}=\frac{V_{C2}\times 2C+V_{C3}\times 3C}{2C+3C}=\frac{\frac{1}{5}\times 2C+\frac{2}{15}\times 3C}{2C+3C}=\frac{12}{75}V\)

      At the end of this, the voltage across different capacitors are,
      \(V_{C1}= \frac{4}{5}V,V_{C2}= \frac{12}{75}V,V_{C3}= \frac{12}{75}V\)

      S1 on for the 3rd time
      Similarly, Capacitors voltage while S1 is on for the third time are,
      \(V_{C1}= \frac{4}{5}+\{(1-\frac{4}{5}-\frac{12}{75})\times \frac{2}{3}\}=\frac{62}{75}V\)
      \(V_{C2}= \frac{12}{75}+\{(1-\frac{4}{5}-\frac{12}{75})\times \frac{2}{3}\}=\frac{13}{75}V\)
      S2 on for the 3rd time

      \(V_{2}=\frac{V_{C2}\times 2C+V_{C3}\times 3C}{2C+3C}=\frac{\frac{13}{75}\times 2C+\frac{12}{75}\times 3C}{2C+3C}=\frac{62}{375}V\)
      At the end of this,
      \(V_{C1}= \frac{62}{75}V,V_{C2}= \frac{62}{375}V,V_{C3}= \frac{62}{375}V\)

      Now, Observe the voltage across V2=VC2 after each cycle (in one cycle both S1 and S2 are on ).

      1st Cycle, \(V_{2}(T)=V_{C3}(T)=\frac{2}{15}\)
      2nd Cycle, \(V_{2}(2T)=V_{C3}(2T)=\frac{12}{75}\)
      3rd Cycle, \(V_{2}(3T)=V_{C3}(3T)=\frac{62}{375}\)

      Now, check if there is any relation between these voltages? Yes, it has!
      \(V_{2}(2T)-V_{2}(T)=\frac{1}{5} \times V_{2}(T)\) 
      also
      \(V_{2}(3T)-V_{2}(2T)=\frac{1}{5} \times V_{2}(2T)\)

      Clearly, It's a GP series
      \(V_{2}(\infty)=\frac{2}{15} \times (1+\frac{1}{5}+\frac{1}{5^{2}}+\frac{1}{5^{3}}+.............)= \frac{\frac{2}{15}}{1-\frac{1}{5}}= \frac{1}{6}V\)




      Finally, we got the answer after so much hard work. You are very eager to hear the phase 'well done' from the interviewer, instead, you can hear the sound of snoring.

      Well, don't get sad if you are able to solve by this method, it means your basic is very strong, That I can say for sure! 

      But you all know, This blog is only concerned about problem-solving by intuition only. 


      Intuitive Approach:
      Well, first tell me what do you mean by steady-state?
      Well, you might answer, steady-state is something that doesn't change with time (Voltage or current). 
      Correct!
      At steady-state irrespective S2 being 'on' or 'off' $V_{C3}$ doesn't change. That means C3 can't take charge from C2 anymore. That concludes $V_{C2}=V_{C3}$, they are in parallel.
      At steady-state equivalent circuit looks like,  




      Now, easily you can find the voltage V2 in steady-state using the capacitive voltage division rule.
      \(V_{2}=1 \times \frac{C}{C+(2C||3C)}=1 \times \frac{C}{C+5C}=\frac{1}{6}V\)


      For More content click here INDEX
      To have a hand on switch-cap, have a look at Basic of Charge conservation.
      For Interview question of Texas Instruments.