This post is going to deal with a very basic concept of differential amplifier. What I personally feel is that, not many students are clear about the virtual ground/ half circuit concept in diff amp. Textbooks will make the half circuit and simply find the gain, which is the root of the problem. But remember, always go with the basics. So, personally I would prefer to write 5 extra lines instead of the half circuit approach and you will find its worth when you come across the 2nd problem of this post.

Before starting let me tell you the convention. I have used Capital Letters for DC and Small letters for AC. Suppose $V_{out}=V_{OUT}+v_{out}$ where $V_{OUT}$ is the common mode value and $v_{out}$ is the small signal value.

I shall start this post with a very simple and common question. Let's consider the following circuit of Fig:1(a). Let's try to find the differential gain $A_{dm}$ and common mode gain $A_{cm}$. Ignore $g_{ds}$. Take $g_m$ of M1= $g_m$

Let's start with DC analysis, by applying a common voltage of $V_{CM}$ at the gate of M1 and M2. As the gates have same potential and the sources are shorted, hence $V_{GS1}=V_{GS2}$. Also $(W/L)_1=(W/L)_2$. So, the bias current $I_B$ will divide in 1:1 ratio, hence M1 and M2 will carry a current of $\frac{I_B}{2}$.

$V_{OUT1}=V_{OUT2}=V_{DD}-\frac{I_BR}{2}$

Hence, $A_{cm}=\frac{V_{OUT1}-V_{OUT2}}{VCM}=0$

Now, $g_m=\mu_nC_{ox}\frac{W}{L}\left(V_{GS}-V_{TH}\right)$

So, $g_{m1}=g_{m2}$

Now, let's jump to the ac analysis by applying $+\frac{vin}{2}$ at the gate of M1 and $-\frac{vin}{2}$ at the gate of M2. The $V_{DD}$ is ac grounded and also the $I_B$ is opened as these sources won't change small signal wise.

Let's try to find out what will happen to the $v_x$ small signal wise. Applying KCL at $v_x$,

$g_{m1}v_{gs1}+g_{m2}v_{gs2}=0$

$g_m\left(\frac{v_{in}}{2}-v_x\right)+g_m\left(-\frac{v_{in}}{2}-v_x\right)=0$

$v_x=0$

So, the $v_x$ node won't move small signal wise. Hence, $v_x$ will be at ac ground.

So, $i_1=g_m\frac{v_{in}}{2} => v_{out1}=-i_1R=-g_mR\frac{v_{in}}{2}$

$i_2=-g_m\frac{v_{in}}{2} => v_{out2}=-i_2R=g_mR\frac{v_{in}}{2}$

Hence, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-g_mR$

Now, let me make a small change in this circuit with the same question. Let's try to find the differential gain $A_{dm}$ and common mode gain $A_{cm}$ of Fig:2(a). Ignore $g_{ds}$. Take $g_m$ of M1= $g_m$. (First give it an honest try without seeing the solution)

Let's start with DC analysis, by applying a common voltage of $V_{CM}$ at the gate of M1 and M2. As the gates have same potential and the sources are shorted, hence $V_{GS1}=V_{GS2}$. But, $(W/L)_2=5(W/L)_1$. So, the bias current $I_B$ will not divide in 1:1 ratio in this case.

Assuming square law is valid,

$I_1=\frac{\mu_nC_{ox}}{2}\frac{W}{L}\left(V_{GS}-V_{TH}\right)^2$

$I_2=\frac{\mu_nC_{ox}}{2}\frac{5W}{L}\left(V_{GS}-V_{TH}\right)^2$

So, $I_1=\frac{I_B}{6}$ and $I_2=\frac{5I_B}{6}$

$V_{OUT1}=V_{DD}-I_1\left(5R\right)=V_{DD}-\frac{5I_BR}{6}$

$V_{OUT2}=V_{DD}-I_2R=V_{DD}-\frac{5I_BR}{6}$

Hence, $A_{cm}=\frac{V_{OUT1}-V_{OUT2}}{VCM}=0$

Now $g_m=\mu_nC_{ox}\frac{W}{L}\left(V_{GS}-V_{TH}\right)$

So, $g_{m2}=5g_{m1}$

Let's try to find out what will happen to the $v_x$ small signal wise. Applying KCL at $v_x$,

$g_{m1}v_{gs1}+g_{m2}v_{gs2}=0$

$g_m\left(\frac{v_{in}}{2}-v_x\right)+5g_m\left(-\frac{v_{in}}{2}-v_x\right)=0$

$v_x=-\frac{v_{in}}{3}$

So, the $v_x$ node will move small signal wise. Hence, $v_x$ will not be at ac ground.

So, $i_1=g_{m1}v_{gs1}=g_m(\frac{v_{in}}{2}+\frac{v_{in}}{3})=\frac{5g_mv_{in}}{6}$

$\Rightarrow v_{out1}=-i_1\left(5R\right)=-\frac{25g_mRv_{in}}{6}$

$i_2=g_{m2}v_{gs2}=5g_m(-\frac{v_{in}}{2}+\frac{v_{in}}{3})=-\frac{5g_mv_{in}}{6}$

$\Rightarrow v_{out2}=-i_2R=-\frac{5g_mRv_{in}}{6}$

Hence, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-5g_mR$

Now, you may get a small doubt here. Suppose, you are applying the virtual ground (which is indeed wrong) and you have 2 half circuits.

For the left half circuit, $v_{out1}=-g_m\left(5R\right)\frac{v_{in}}{2}$

For the right half circuit, $v_{out2}=-5g_m\left(R\right)\frac{-v_{in}}{2}$

So, $A_{dm}=\frac{v_{out1}-v_{out2}}{v_{in}}=-5g_mR$ which is matching with the answer. But I would like to say, it's not the right way as your assumption of virtual ground is completely wrong. But it's also important to know, then why is it giving the right answer? Let's find out. For that, we have to know, whether the differential gain depends on the value of $v_x$ or not.

$i_1=g_{m1}v_{gs1}=g_m\left(\frac{v_{in}}{2}-v_x\right)$

$\Rightarrow v_{out1}=-i_1\left(5R\right)=-\left(5R\right)g_m\left(\frac{v_{in}}{2}-v_x\right)$

$i_2=g_{m2}v_{gs2}=5g_m\left(-\frac{v_{in}}{2}-v_x\right)$

$\Rightarrow v_{out2}=-i_2\left(R\right)=-\left(5R\right)g_m\left(-\frac{v_{in}}{2}-v_x\right)$

$v_{out1}-v_{out2}=-\left(5R\right)g_m\left(\frac{v_{in}}{2}-v_x\right)+\left(5R\right)g_m\left(-\frac{v_{in}}{2}-v_x\right)$

$\Rightarrow v_{out1}-v_{out2}=-5g_mRv_{in}+5Rv_x-5Rv_x=-5g_mRv_{in}$

So, basically the terms containing $v_x$ are cancelling each other, that's why the differential gain is not depending on the value of $v_x$. But for dc wise imbalanced circuit, it won't happen and the answer will be wrong if you consider $v_x$ as virtual ground.

I hope, next time you won't face any confusion related to half circuit analysis or virtual ground. Happy learning.

Insights of Random Mismatch

"Random Mismatch" is a tricky but very important topic with respect to Analog Design. As a learner, (still I am a learner, jokes apart!) I never found the crisp one shot material related to "Random Mismatch" in the internet. Of course you will find some piecewise information (with some boring mathematics without any application) about this topic but you can't find any material where the real application of mismatch has been demonstrated with respect to analog design viewpoint. In reality, you have to meet a given accuracy spec (say 1% or 5%), and that's where random mismatch calculations come into picture to decide the W and L of the MOSFETs in your circuit. I will try to show some demonstrations in this blog.

I have explained the basic concept of "Random Mismatch" and Current Mirror Offset in the previous two blogs. In this blog, I will be explaining how to quantify the offset in a diff pair and how to meet a certain offset spec in a diff pair by sizing the transistors properly with help of mismatch calculations.

Offset Derivation of Diff Pair:

The following I-V equation for a MOSFET in saturation is used:

$I_D=\frac{\beta }{2}\left ( V_{GS}-V_t \right )^{2}$ where $\beta =\mu C_{ox}\frac{W}{L}$

$\Rightarrow \Delta I_D=\frac{\Delta \beta }{2}\left ( V_{GS}-V_t \right )^{2}-\Delta V_t\frac{\beta }{2}2\left ( V_{GS}-V_t \right )+\Delta V_{GS}\frac{\beta}{2}2\left (V_{GS}-V_t \right)$

Constant current so, $\Delta I_{D}=0$

$0=\frac{\frac{\Delta \beta }{2}\left ( V_{GS}-V_t \right )^{2}}{\frac{\beta }{2}2\left ( V_{GS}-V_t \right )}-\Delta V_t+\Delta V_{GS}$

$\Delta V_{GS}=-\frac{\Delta \beta }{\beta }\frac{\left ( V_{GS}-V_t \right )}{2}+\Delta V_t$

$\Delta V_{GS}=-\frac{\Delta \beta }{\beta }\frac{I_D}{g_m}+\Delta V_t$

$\Rightarrow \sigma _{\Delta V_{GS} }=\sqrt{\left ( \frac{\sigma _{\Delta \beta }}{\beta }\frac{I_D}{g_m} \right )^2+\left ( \sigma_{ \Delta V_t } \right )^2}$ ......(1)

Neglecting $\beta $ mismatch, (In the previous blog, I have proved that we can easily neglect $\beta$ mismatch with respect to $V_t$ mismatch while doing the analysis. Still, I will prove once again in Problem1)

$\sigma _{\Delta V_{GS} }=\sigma_{\Delta V_t}$ ......(2)

Let's jump into a practical problem to understand the significance of the above analysis. In industry, diff pair and current mirror are probably the most used circuits in any analog block. So, it's very important to know how to design a diff pair and current mirror very accurately to meet the specs. Now this example can be demonstrated in 2 ways.

Analysis: You will be given the sizes of the current mirror transistors and you have to find the accuracy of the current mirror.
Synthesis: You have to design the current mirror to meet a given accuracy spec.

So, I shall take 2 problems. Problem 1 will be an Analysis of a diff pair and Problem 2 will be a Synthesis/Design problem where I will merge the concepts of a diff pair and current mirror both!

Problem Statement 1:

Calculate Input Referred Offset $V_{io}$ (6-sigma) of the given NMOS diff pair

given,

$I_{tail}=5 \mu A$
$\mu _nC_{ox}=15\mu A/V^2$
$A_{Vt}=15mV\mu m$
$A_{\beta }=2\%\mu m$
$\left (\frac{W}{L}\right )_{1,2}=\frac{40 \mu m}{1 \mu m}$

Solution:

$I_D=\frac{I_{tail}}{2}=2.5\mu A$

$g_{m1,2}=\sqrt{2I_D\mu_nC_{ox}\left (\frac{W}{L} \right )_{1,2}}=54.77\mu S$

From the previous blog we know, the threshold mismatch $\Delta V_t$ and $\beta$ mismatch between two MOSFETs of same sizes will be:

$\sigma _{\Delta V_t}=\frac{A_{Vt}}{\sqrt{WL}}=3.87mV$

$\frac{\sigma _{\Delta \beta }}{\beta}=\frac{A_{\beta}}{\sqrt{WL}}=3.16mV$

$\Rightarrow \frac{\sigma _{\Delta \beta }}{\beta}\frac{I_D}{g_m}=\frac{A_{\beta}}{\sqrt{WL}}\frac{I_D}{g_m}=0.14mV$

From (1), $\sigma _{\Delta V_{GS} }=\sqrt{\left ( \frac{\sigma _{\Delta \beta }}{\beta }\frac{I_D}{g_m} \right )^2+\left ( \sigma_{ \Delta V_t } \right )^2}=\sqrt{\left (0.14mV\right)^2+\left (3.87mV\right)^2}=3.87mV$

$\therefore V_{io}=6\sigma_{\Delta V_{GS}}=23.23mV$

It is clear from the above example that we can safely ignore the $\beta$ mismatch with respect to $V_t$ mismatch. In the next example, we shall proceed with only $V_t$ mismatch.

Problem Statement 2:

Design a diff pair with active current mirror load with input-referred offset (6-sigma) of 3mV

given,

$I_{tail}=2 \mu A$
$\mu _nC_{ox}=150\mu A/V^2$
$\mu _pC_{ox}=40\mu A/V^2$
$A_{Vtn}=8.5mV\mu m$
$A_{Vtp}=4mV\mu m$
$g_{mp}=40\mu S$
$\left (V_{ov}\right )_n=250mV$

Solution:

$I_D=\frac{I_{tail}}{2}=1\mu A$

$g_{mn}=\frac{2I_D}{V_{ovn}}=8\mu S$

Given, $V_{io}=6\sigma_{\Delta V_{GS}}=3mV \Rightarrow \sigma_{\Delta V_{GS}}=0.5mV \Rightarrow \sigma_{\Delta V_{GS}}^2=0.25\mu V^2$

Assuming half of this variance from diff pair and rest half is from current mirror.

$\sigma_{\Delta V_{GS}}^2 \left(diff pair\right)=0.125\mu V^2 \Rightarrow \sigma_{\Delta V_{GS}}\left(diff pair\right)=0.353 V$

$\sigma_{\Delta V_{GS}}^2\left(Current Mirror\right)=0.125\mu V^2 \Rightarrow \sigma_{\Delta V_{GS}}\left(Current Mirror\right)=0.353 V$

Diff Pair:

$\sigma_{\Delta V_{GS}}\left(Diff pair\right)=\sigma_{\Delta V_{tp}}=\frac{A_{Vtp}}{\sqrt{WL_p}}=0.353 V$

$\Rightarrow \left(WL\right)_p=128 {\left(\mu m\right)}^2$......(3)

$\left({\frac{W}{L}}\right)_p=\frac{{g_{mp}}^2}{2I_D \mu_PC_{ox}}$

$\Rightarrow \left({\frac{W}{L}}\right)_p=20$......(4)

Solving (3) and (4), $\left({\frac{W}{L}}\right)_p=\frac{50.5\mu m}{2.5\mu m}$

Current Mirror:

$\sigma_{\Delta V_{GS}}\left(Current Mirror\right)=\frac{\sigma_{\Delta I_D}}{g_{mp}}=\frac{\sigma_{\Delta I_D}}{I_D}\ast \frac{I_D}{g_{mp}}=\frac{g_{mn}}{I_D} \sigma_{\Delta V_{tn}} \ast \frac{I_D}{g_{mp}}$

$\sigma_{\Delta V_{GS}}\left(Current Mirror\right)=\frac{g_{mn}}{g_{mp}} \sigma_{\Delta V_{tn}}=\frac{g_{mn}}{g_{mp}} \frac{A_{Vtn}}{\sqrt{WL_n}}=0.353V $

$\Rightarrow \left(WL\right)_n=23.1 {\left(\mu m\right)}^2$......(5)

$\left({\frac{W}{L}}\right)_n=\frac{{g_{mn}}^2}{2I_D \mu_nC_{ox}}$

$\Rightarrow \left({\frac{W}{L}}\right)_n=0.213$......(6)

Solving (5) and (6), $\left({\frac{W}{L}}\right)_n=\frac{2.2\mu m}{10.4\mu m}$

$M1:50.5\mu m/2.5\mu m$

$M2:50.5\mu m/2.5\mu m$

$M3:2.2\mu m/10.4\mu m$

$M4:2.2\mu m/10.4\mu m$

Conclusion:

So, this is the way to design diff pair and current mirror with the help of "Random Mismatch". The take away is, we can easily neglect $\beta$ mismatch with respect to $V_t$ mismatch while doing the analysis.

So, as promised I have shown some frequently used practical examples of random mismatch. Possibly you have never seen such detailed analysis regarding "Random Mismatch". Believe me, I have invested a lot of time to derive these equations because neither these are available in books nor in the internet. Also, after deriving, I have cross checked the results by simulations to ensure I am not passing any wrong information to the readers. So, if you appreciate this blog, in the comment section please let us know, does this content/blog add some value to you? If you have any suggestion/feedback for us to make this blog better, you are highly appreciated.

Analog Intuition (GATE & VLSI)

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